Carrier board design-in training
Everything you need to know for a head-start in carrier board designs
Carrier Board Design-in Training
Scope?
With this training you will get an in-depth training about all carrier board related design topics. The focus is on COM-HPC and SMARC carrier board designs.
Target Audience?
Carrier Board Hardware Design Engineers
When
In-person, Deggendorf | October 10-11, 2023, 9 am to 5 pm (Central European Time)
Online | October 16-20, 2023, 9 am to Noon (Central European Time)
Online | November 06-10, 2023, 9 am to Noon (Pacific time)
Agenda
- Introduction Carrier Board Design
- COM-HPC Update
- High-speed Standard PC Interfaces (e. g. PCIe, USB, Ethernet, Displays)
- Low-speed Standard PC Interfaces (e. g. eSPI, I²C, GPIOs)
- Power Management
- Design Basics & Carrier Board Component Selection
- PCB Design Rules
- Signal Integrity in Embedded Applications
- congatec x86 Firmware (e. g. Embedded BIOS and Board Controller Features)
- Carrier Board Design Verification Test and Mass Production Tester
- Cooling Concepts
- Design-In Support incl. Roadmap Update and TSC Services
Price
500 USD per person
Learn more about Computer-on-Modules
Computer-on-Module standards
A lot is happening in the Computer-on-Module market today. With SMARC 2.1, a new version of the low-power module specification is now available. And COM-HPC, the soon-to-come high-end embedded computing standard, is also raising many new questions. So what do OEMs and system designers need to know?
Download Technical Article
