Carrier board design-in training

Everything you need to know for a head-start in carrier board designs

Carrier Board Design-in Training

Scope?

With this training you will get an in-depth training about all carrier board related design topics. The focus is on COM-HPC and SMARC carrier board designs.

Target Audience?

Carrier Board Hardware Design Engineers

Price

500 USD per person

When

Online

April 15th – 19th  (Monday – Friday, each from 9 – 12 am PDT) USA
October 7th – 11th (Monday – Friday, each from 9 – 12 am CET) EMEA / APAC  
October 21st – 25th (Monday – Friday, each from 9 – 12 am PDT) USA


In-person

March 19th / 20th       (Tuesday, Wednesday)                                       EMEA                
October 15th / 16th (Tuesday, Wednesday) EMEA

Agenda

  • Introduction Carrier Board Design
  • COM-HPC Update
  • High-speed Standard PC Interfaces (e. g. PCIe, USB, Ethernet, Displays)
  • Low-speed Standard PC Interfaces (e. g. eSPI, I²C, GPIOs)
  • Power Management
  • Design Basics & Carrier Board Component Selection
  • PCB Design Rules
  • Signal Integrity in Embedded Applications
  • congatec x86 Firmware (e. g. Embedded BIOS and Board Controller Features)
  • Carrier Board Design Verification Test and Mass Production Tester
  • Cooling Concepts
  • Design-In Support incl. Roadmap Update and TSC Services

 

 

Register for training

 

 

Learn more about Computer-on-Modules

Computer-on-Module standards

A lot is happening in the Computer-on-Module market today. With SMARC 2.1, a new version of the low-power module specification is now available. And COM-HPC, the soon-to-come high-end embedded computing standard, is also raising many new questions. So what do OEMs and system designers need to know?
Download Technical Article

Which form factor to choose?

Credit card sized Computer-on-Modules
 

Download Technical Article