Carrier board design-in training
Everything you need to know for a head-start in carrier board designs
Carrier Board Design-in Training
Scope?
This course provides in-depth training on all carrier board-related design topics. The focus is on the design-in of COM-HPC and SMARC Computer-on-Modules.
Target Audience?
Carrier Board Hardware Design Engineers
Price
500 USD per person
When
Online
| October 7th – 11th | (Monday – Friday, each from 9 – 12 am CET) | EMEA / APAC |
| October 21st – 25th | (Monday – Friday, each from 9 – 12 am PDT) | USA |
In-person
| October 15th / 16th | (Tuesday, Wednesday) | EMEA |
Agenda
- Introduction Carrier Board Design
- COM-HPC Update
- High-speed Standard PC Interfaces (e. g. PCIe, USB, Ethernet, Displays)
- Low-speed Standard PC Interfaces (e. g. eSPI, I²C, GPIOs)
- Power Management
- Design Basics & Carrier Board Component Selection
- PCB Design Rules
- Signal Integrity in Embedded Applications
- congatec x86 Firmware (e. g. Embedded BIOS and Board Controller Features)
- Carrier Board Design Verification Test and Mass Production Tester
- Cooling Concepts
- Design-In Support incl. Roadmap Update and TSC Services
Register for training
Learn more about Computer-on-Modules
计算机标准
今天的计算机模块市场方兴未艾。搭载SMARC 2.1的低功耗模块规格的新版本现已面世，而即将 推出的高端嵌入式计算标准COM-HPC也提出了许多新的问题。OEM和系统设计人员需要知道什 么呢？
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